An efficient 10GBASE-T ethernet LDPC decoder design with low error floors
From Thermodynamics of Computation
- reference groups
- Computer Science Engineering to Address Energy Costs
- author-supplied keywords
- Error floors
- Iterative decoder architecture
- Low-density parity-check (LDPC) code
- Message-passing decoding
- Post-processing
- keywords
- authors
- Zhengya Zhang
- Venkat Anantharam
- Martin J. Wainwright
- Borivoje Nikolić
- title
- An efficient 10GBASE-T ethernet LDPC decoder design with low error floors
- type
- journal
- year
- 2010
- source
- IEEE Journal of Solid-State Circuits
- pages
- 843-855
- volume
- 45
- issue
- 4
- link
- https://www.mendeley.com/catalogue/80aa3983-c87c-3aa7-98b8-004dfd8a238f/(Error!"Error!" is not a number.)
Counts
- Citation count
- 123
- Page views
- 0
Identifiers
- doi: 10.1109/JSSC.2010.2042255 (Google search)
- issn: 00189200
- sgr: 77950190435
- scopus: 2-s2.0-77950190435
- pui: 358546613
